AMD Zen 5 Architecture: Compact Cores and SoC Details
7/24/2024AMD Zen 5 Architecture: Compact Cores and SoC Details
AMD recently unveiled its Zen 5 Tech Day, providing deeper insights into the upcoming Ryzen 9000 ‘Granite Ridge’ and Ryzen AI 300 ‘Strix Point’ processors. Let’s explore the highlights of the Zen 5 microarchitecture and the innovative features it brings.
Compact Cores: Smaller and Efficient
- Zen 5c Cores: These ‘compact’ cores are approximately 25% smaller than the standard Zen 5 cores. Unlike Intel’s e-cores, AMD’s Zen 5c cores maintain the same microarchitecture and feature set as their larger counterparts.
- Cache Variation: For the first time, AMD integrates two core types with different cache capacities on the same die. The four full-sized performance cores have 4MB of L3 cache each, while the eight compact cores have 1MB of L3 cache each.
- Power Efficiency: The reduced L3 cache not only saves space but also significantly reduces power consumption. AMD aims to maximize battery life by running tasks on compact cores whenever possible.
Strix Point SoC: Unique Design
- Scale-Out Performance: The Strix Point SOC features a unique combination of compact and full-sized cores. It optimizes power-to-performance ratios, allowing for efficient scaling.
- Datapath Widths: Strix Point includes various datapath widths for different compute units. The GPU boasts quad 32B/cycle ports, while the XDNA neural processing unit (NPU) has its own 32B/cycle interface.
- Reduced PCIe Lanes: Strix Point uses 16 PCIe lanes (down from 20) to save power. This decision aligns with the low attach rate of secondary storage in this segment.
Die Comparison
- Granite Ridge (Ryzen 9000 ‘Eldora’): 8 Zen 5 cores, 70.6mm² die, 8.315 billion transistors, N4P process.
- Strix Point: 4 Zen 5 + 8 Zen 5c cores, 232.5mm² die, larger integrated GPU (up to 16 RDNA 3.5 Compute Units).
Zen 5 Microarchitecture Insights
- SMT and ISA Support: Both Zen 5 core types support simultaneous multithreading (SMT) and the same instruction set architecture (ISA), avoiding scheduling complexities.
- Performance Parity: AMD prioritizes minimizing performance differences between core types during multi-core workloads, avoiding scheduling cliffs.
- Voltage/Frequency Curve: AMD targets a specific voltage/frequency curve for compact cores, optimizing power and performance trade-offs.
In summary, AMD’s Zen 5 architecture introduces compact cores, innovative cache management, and efficient SoC designs. The Ryzen 9000 series powered by Zen 5 is set to arrive on July 31, promising exciting performance improvements. Stay tuned for comprehensive reviews and benchmarks.