Tom Petersen speaks on Intel Panther Lake Xe3 and NPU5 Accelerators

Learn about Panther Lake’s new GPU and NPU accelerators in this technical session from the Intel Technology Tour 2025. Intel Fellow Tom “TAP” Petersen explains improvements in our Xe3 GPU architecture, including a larger L2 cache, enhanced ray tracing units, and upgrades to vector and XMX engines. He previews their impact on performance and peeks into the future with DirectX cooperative vectors that allow 3D visuals to be created from 2D images in real time. Delving deeper into AI, TAP explains the new NPU architecture available across the Panther Lake family. NPU5 is more area efficient than its predecessor while also improving performance and programmability. It features upgraded MAC arrays, native support for FP8 datatypes, and enhancements to internal data conversion.