AMD Zen 6 "Medusa Point" Leaked: 10-Core APU with 32MB Cache

Medusa Point is the confirmed codename for the successor to the "Strix Point" APUs (Ryzen AI 300 series). While Strix Point brought the hybrid architecture (mixing "Zen 5" and "Zen 5c" cores) to the mainstream, Medusa Point is expected to refine this with the new Zen 6 architecture.

The "Plum" platform where this chip was spotted is a known testing ground for AMD's mobile engineering samples. The appearance of a Ryzen 9 label with a 10-core configuration is intriguing. Current top-tier Strix Point chips feature 12 cores (4+8 configuration). A shift to 10 cores in a Ryzen 9 SKU could imply a shift in core strategy—perhaps moving toward fewer, more powerful performance cores, or a specific 6+4 hybrid setup tailored for high-frequency gaming.

The 32 MB L3 Cache Leap

The standout statistic here isn't the core count, but the cache. The current flagship Strix Point APUs top out at 24 MB of L3 cache. This new Zen 6 leak jumps straight to 32 MB.

In the world of APU gaming, cache is king. Because integrated graphics (iGPUs) share system RAM, they are often bandwidth-starved compared to discrete cards with dedicated VRAM. A larger L3 cache acts as a high-speed buffer for the CPU and GPU, reducing the need to fetch data from slower system memory.

What this means for gaming:

• Higher 1% Lows: Smoother gameplay with fewer stuttering dips.
• Better iGPU Performance: The integrated RDNA graphics won't be waiting on the CPU as often, allowing for higher frame rates in memory-bound titles like *Cyberpunk 2077* or *Starfield*.

Speculation: Hybrid Architecture Evolution

While the exact breakdown of the 10 cores (Performance vs. Efficiency) is not yet confirmed, we can make an educated guess based on the Medusa roadmap.

Scenario A: 6P + 4E
If AMD sticks to the Strix Point layout but reduces the core count, we might see 6 powerful Zen 6 cores paired with 4 efficient "c-cores." This would offer exceptional single-threaded speed for productivity while maintaining efficiency.

Scenario B: 8P + 2E
Alternatively, AMD could be shifting the balance toward pure performance. If the "Efficiency" cores in Zen 6 are powerful enough, they might need fewer of them. An 8P+2E layout would be a monster for gaming, where background tasks are offloaded to the E-cores.

What About the Graphics?

Medusa Point is expected to utilize the RDNA 3.5 or perhaps an early iteration of RDNA 4 graphics architecture. While the leak focuses on the CPU, the increased L3 cache strongly suggests the iGPU is getting a serious workout.

This is promising news for the handheld market. If Medusa Point is power-efficient enough, it could be the silicon inside the Steam Deck 2 or the next generation of ASUS ROG Ally X devices. A 10-core Zen 6 CPU with 32MB cache would absolutely crush the current Steam Deck's performance.

The jump to 32 MB of L3 cache on the "Medusa Point" APU signals that AMD is serious about making integrated graphics perform closer to entry-level discrete cards.

Frequently Asked Questions

Q: What is Medusa Point?
A> Medusa Point is the codename for AMD's next-generation mobile APU family, expected to feature the Zen 6 CPU architecture and updated RDNA graphics.

Q: How many cores does the leaked Ryzen 9 Medusa Point have?
A> The leak shows a 10-core configuration, though the specific split between Performance and Efficiency cores is currently unverified.

Q: Why is 32 MB of L3 cache important?
A> More cache significantly improves performance in bandwidth-sensitive tasks like gaming, especially for APUs that rely on system memory.

Q: When will Medusa Point launch?
A> Based on typical product cycles, Medusa Point laptops and devices are expected to launch in late 2026 or early 2027.

Q: Will Medusa Point be in the Steam Deck 2?
A> [UNVERIFIED] It is a strong candidate given the efficiency improvements, but Valve has not confirmed the silicon for the next-gen Deck yet.