Architectural Breakdown: Full Leaked Specifications for NVIDIA N1 and N1X Arm Laptop SoCs

Hot on the heels of the Dell Computex directory leak, a comprehensive technical breakdown has surfaced via VideoCardz detailing the complete silicon matrix for NVIDIA's upcoming N1 and N1X Arm-based SoC family. Culled from internal documents, the leak reveals four distinct silicon configurations spanning premium creator workstations down to thin-and-light mainstream laptops.

The core takeaway from these specifications is structural: NVIDIA is not just building a mobile processor; they are introducing a massive I/O and memory subsystem designed to rival desktop architectures within tight mobile thermal constraints. Both product tiers tie MediaTek-designed Armv9.2 CPU clusters directly to Blackwell-generation graphics architecture via an ultra-wide memory interface.

The Complete N1 Family Specification Matrix

The leaked internal technical data establishes clear boundaries between the enthusiast-grade N1X tier and the mainstream efficiency-focused N1 tier:

NVIDIA N1X (Enthusiast & Prosumer Tier)

• NVIDIA N1X "675" Configuration: Features a 20-core CPU layout containing 10x Cortex-X925 performance cores and 10x Cortex-A725 efficiency cores. This is paired with a full-fat 48 SM (Streaming Multiprocessor) Blackwell GPU, totaling 6,144 CUDA cores.
• NVIDIA N1X "650" Configuration: A slightly harvested 18-core CPU variant in a balanced 9+9 arrangement, utilizing a 40 SM Blackwell GPU configuration with 5,120 CUDA cores.
• Power & Package: Both N1X tiers operate within a shared 45W to 80W TDP package, which dynamically balances power routing between the CPU and GPU.
• Memory Subsystem: Employs a massive 16-channel wide memory interface supporting between 16GB and 128GB of LPDDR5X unified memory.
• Platform I/O: Provides substantial expansion capabilities with 12x PCIe 5.0 lanes plus 5x PCIe 4.0 lanes, enabling native support for up to three concurrent M.2 NVMe solid-state drives.

NVIDIA N1 (Mainstream & Thin-and-Light Tier)

• NVIDIA N1 "Chip 1" Configuration: Steps down to a 12-core CPU configuration (8x Cortex-X925 + 4x Cortex-A725). The graphical processor utilizes 20 SMs, translating to 2,560 CUDA cores—matching the raw core target of mobile mainstream discrete hardware.
• NVIDIA N1 "Chip 2" Configuration: The entry-level option features a 10-core CPU layout (7x Cortex-X925 + 3x Cortex-A725) paired with a 16 SM Blackwell GPU containing 2,048 CUDA cores.
• Power & Package: Designed strictly for high-efficiency mobile envelopes, targeting a 18W to 45W TDP package.
• Memory Subsystem: Scales down to an 8-channel memory interface, capping total capacity configurations between 8GB and 64GB of LPDDR5X.
• Platform I/O: Features 8x PCIe 5.0 lanes plus 3x PCIe 4.0 lanes, supporting up to two internal M.2 SSD drives.

Silicon Origins: The specifications confirm that the top-tier N1X die shares identical fundamental compute resources with the GB10 Superchip used in NVIDIA's enterprise DGX Spark AI platform. The critical transformation here is the integration of consumer-focused display engines, platform I/O mapping, and low-power LPDDR5X memory physical layers (PHYs) essential for premium mobile Windows deployments.

I/O and Bandwidth Analysis

The inclusion of dedicated PCIe 5.0 lanes directly on the SoC indicates that NVIDIA is not abandoning modular storage expansion in favor of fully soldered ecosystems. While the system memory remains integrated on-package or adjacent via the multi-channel LPDDR5X interface to achieve its necessary high bandwidth, the I/O configurations ensure that creators and enterprise users can scale high-speed storage without hitting performance limits.

Furthermore, the 16-channel layout on the N1X yields a 256-bit total bus width. When paired with high-speed LPDDR5X memory modules, this architecture provides a massive structural advantage for memory-bandwidth-heavy tasks like localized generative AI model execution, which traditionally chokes on the narrower memory buses of typical x86 mobile platforms.