AMD Sold Out 2027 CPUs, a CPU With No Instruction Set, and a Quantum Result

By Indie Kings | September 30, 2026

Updated September 30, 2026: Seven stories, one shape. AMD has sold out all 2027 server CPU capacity and started taking 2028 orders, with prices up more than 40% and Intel meeting only about half of demand. A startup founded by the architects of Apple's most disruptive silicon says that entire model is obsolete and is building a CPU core without committing to an instruction set. Raja Koduri puts the capital needed to build all of it at $24 trillion and says it does not exist. And IBM has published a quantum result on commercial cloud hardware that the world's fastest supercomputer would need 110 years to match. The constraint moved from silicon to capacity, and one result claims to have escaped it entirely.

Image: AI data center hardware. Credit: BigGo Finance.

AMD has sold out 2027, and prices are up 40%

This is the item with real teeth, and it is the supply story rather than the benchmark story.

Per BigGo Finance, demand for AMD's EPYC 9006 series is such that all 2027 production capacity has already been sold out, and AMD has begun accepting orders for 2028. The processor, codenamed Venice, is AMD's first microarchitecture designed from the ground up for data center use, built on Zen 6 on TSMC's 2nm process, and unveiled at Advancing AI 2026.

The stated reason is a workload change, and it is a good one. Agentic AI needs iterative task planning, tool invocation, sandboxed execution and vector database retrieval, and all of that lands on the CPU. If the CPU cannot keep up, GPU utilization drops and expensive accelerator capacity sits idle. TrendForce data cited in the report puts CPU task orchestration at 50% to 90% of total latency in agentic workloads, with the CPU-to-GPU ratio converging from 1:8 toward 1:1 or lower.

Morgan Stanley projects 6.75 million units shipped in 2027 against roughly 1.25 million in 2026, and at a blended average selling price of $7,691 that is about $51 billion in revenue. Four models launch across Q4 2026 through the second half of 2027. Meta is cited as having deployed millions of EPYC 9006 CPUs already, which is the validation behind the order book.

Huaxin Securities expects the agentic demand uplift to persist into 2027 and does not rule out prices following. The consequence for anyone building a PC is one date worth noting: Intel's roughly 10% PC CPU increase on October 5, 2026.

Nuvacore is building a CPU with no instruction set

Same day, opposite conclusion. This is the only item on the list that is genuinely new to this site.

Nuvacore, led by Gerard Williams III, John Bruno and Ram Srinivasan, detailed its first product on September 29: a general-purpose core called WarpCore, designed without a fixed instruction set architecture from the outset. Williams co-founded Nuvia, which Qualcomm bought in 2021 and turned into the basis for its Oryon cores, and the company has since hired David Williamson, a former Apple CPU engineering leader, as SVP of hardware engineering. Sequoia Capital is backing it.

The strategy is called "Core First." Rather than committing to x86, Arm or RISC-V at the start, the company says it can build a substantial portion of the foundational core IP first and select the ISA later. The argument is that this frees engineers to optimise performance, power and silicon area before architectural constraints are locked in.

And the target is the same workload driving AMD's shortage. Nuvacore's case is that Nvidia's Vera CPU, Arm's AGI CPU and Intel's Xeon positioning are all iterations on architectures that predate agentic systems, which run continuously, hold context over hours or days, and generate irregular and unpredictable memory access patterns. The company contrasts that with server CPUs optimised for predictable enterprise throughput and client CPUs tuned for bursty performance and aggressive power management. Neither matches a processor coordinating millions of agent interactions at low latency.

Two things temper it, and both are in the report. First, you cannot bolt an instruction set on at the end: decode logic, privilege levels, memory ordering, exception handling and software compatibility still impose major constraints. The claim is narrower, that enough of the performance-critical machinery can be built before the ISA is fixed. Second, the legal landscape is not neutral. RISC-V needs no architecture licence. An Arm implementation would require Arm rights, which Arm sells, and the Arm and Qualcomm dispute over Nuvia makes that path more delicate. x86 implementation rights are tightly controlled by Intel and AMD.

Process node, cache hierarchy, pipeline configuration, vector capabilities and tape-out schedule all remain undisclosed, and the company has not said whether the long-term model is complete CPUs, licensable core IP, semi-custom silicon, or some combination.

Koduri's $24 trillion problem

Raja Koduri has led graphics at AMD twice, ran Apple's graphics architecture division, and was Intel's chief architect for core and visual computing. On the TechSurge podcast with David Goldman, he argued the scarce resource is capital, not talent or silicon.

His arithmetic: over 400 gigawatts of new compute infrastructure needed by 2030, at roughly $50 to 60 billion of capital expenditure per gigawatt, of which about $45 billion is GPUs, CPUs, networking and storage. That lands near $24 trillion. His own conclusion: "That's a lot of capital. I don't think we have that capital."

The argumentative move is the interesting part. When Goldman listed Nvidia, AMD, Groq, Cerebras and the custom-silicon cohort as the competitive field, Koduri said the list missed the one that matters: "The competition I say is not between Nvidia, Google, [custom] silicon, Broadcom, AMD at all. It is the competition is between China Inc. and the rest of the world."

His framing puts Chinese buildout capex at under $10 billion per gigawatt against the Western $50 to 60 billion, and he predicts China reaches that target "much sooner than the next three years." Goldman's two pushbacks were that each new GPU generation costs more but delivers more output per unit of energy, and that export controls deny China the most advanced nodes.

Koduri's rebuttal is the technically substantive claim of the whole roundup, and it is a claim about packaging rather than lithography. He argues that in the inference era the logic process node matters far less than memory proximity: take a TSMC 7nm die, a node from roughly 2018 to 2019, and 3D-stack it with hybrid bonding onto DRAM. His claim is that "You get 10x the bandwidth than the current HBM and 10x token generation rate. That package will beat a Vera Rubin."

Tan on competitors, and a $5 billion bet that paid

Intel CEO Lip-Bu Tan, speaking on the A Bit Personal podcast hosted by Jodi Shelton of the Global Semiconductor Alliance, was direct about relationships. Per BigGo Finance: "I never look at people as competitors. I love to win, but business is not a zero-sum game," and, describing who he actually deals with, "Sitting at my head table are my competitors." He also revealed that he flew to Taiwan in late May specifically for Computex Taipei with one purpose: to have lunch with TSMC founder Morris Chang.

The concrete case he offered was Nvidia. Nvidia completed a $5 billion investment in Intel in late December 2025, acquiring 214.8 million shares at a locked-in $23.28 per share. Intel's stock subsequently reached $116.03, which puts that roughly 4% stake near $25 billion.

Tan's framing: "People were surprised. When I started, I reached out to Jensen. People thought he was my competitor, but we became partners, and he invested $5 billion when I needed it." The lesson he is drawing is about capital arriving from a perceived rival at the moment it was needed, which is a different kind of answer to the supply crunch above.

Windows 11 26H2 is a kilobyte, and that is the point

Microsoft has begun rolling out Windows 11 version 26H2, also called the Windows 11 2026 Update, as build 26300.9457. It arrives as what Microsoft calls a small enablement package, which means users on recent versions install it with a single restart and a download measured in kilobytes rather than gigabytes.

For most users the headline is support longevity rather than features. Per BigGo Finance, 26H2 extends servicing to October 10, 2028 for Home and Pro, and Enterprise and Education editions of 26H2 run to October 9, 2029. Meanwhile Windows 11 24H2 Home and Pro stop receiving updates after October 13, 2026, while 24H2 Enterprise and Education and 25H2 Home and Pro both continue to October 12, 2027.

Two practical details. The new taskbar can be repositioned to the top, bottom, left or right, which addresses a long-standing complaint, but it is done through Settings rather than by dragging, and you cannot set different positions per monitor when showing the taskbar on all screens. A smaller taskbar size option is also available. And systems on 26H1 cannot upgrade to 26H2, because 26H1 uses a different platform for current Arm devices, which ship only on new Snapdragon X2 hardware.

Microsoft's Surface portfolio has no room for AMD

Microsoft's newest Surface devices debuted at Qualcomm's Snapdragon Summit in Maui, powered exclusively by Snapdragon and Intel silicon, with Nvidia's RTX Spark reserved for the ultra-premium Surface Laptop Ultra. AMD is absent, which is notable for a company whose chips power the Xbox consoles and handheld hardware.

Brett Ostrum, Microsoft's corporate vice president for Surface devices, addressed it in an interview with Windows Central, and per BigGo Finance the explanation was portfolio arithmetic rather than any technical shortcoming: "We love working with AMD. We have a limited portfolio, and so we have to make our choices pretty wisely in terms of what we're doing and where we're doing." He said the partnership continues on other products but stopped short of confirming AMD in future Surface hardware.

The last Surface with an AMD chip was the Surface Laptop 4. Current Surface Pro and Surface Laptop run on Snapdragon X2 Plus, which Microsoft claims delivers up to 18% better battery efficiency, more than 60% faster graphics and 95% faster on-device AI inference than the previous Snapdragon X Plus.

The one item that is not about scarcity

The seventh story runs the other way, which is why it earns its own section rather than being folded into the pattern above.

A team led by Tigran Sedrakyan, a theoretical condensed matter physicist at BlueQubit, ran random circuit sampling on IBM's 120-qubit Nighthawk r2 and posted results on arXiv. They are not yet peer reviewed. The headline: the processor generated 1 million samples in 19 seconds, while the world's fastest supercomputer would need an estimated 110 years to reproduce the same results.

The details matter more than the headline. They used 61 qubits with random circuits up to 40 cycles deep, with the meaningful results at 36 cycles and 918 two-qubit gates. Estimating the classical cost used tensor-network contraction, arriving at roughly 1.2 by 10 to the 27 operations, then applied that to Frontier's sustained performance. Verification used two independent methods, patch circuits and mirror circuits, and the estimated fidelities agreed at every measured depth.

The surviving quantum signal fidelity at 36 cycles was approximately 0.23%. The report is careful about what that number means, and so is this article: in a noisy circuit information washes out, so 0.23% is not an accuracy score. It is how much of the ideal distribution's signature remains detectable, and the point of 36 cycles is that classical simulation cost saturates while the quantum signal is still measurable.

What distinguishes the experiment is the setting. It ran in IBM's standard cloud environment with no custom calibration, rather than on laboratory-dedicated equipment, and the circuits, samples and analysis code were all published. The researchers state this is, to their knowledge, the first demonstration of quantum advantage for generic random circuit sampling on a commercially accessible processor. Japan's RIKEN installed an IBM Quantum System Two in June 2025 in the same building as Fugaku, with a 156-qubit Heron processor.

Where these come from, and what is a relay

All seven items come from BigGo Finance, which is a rewrite service and not a primary source. Every claim above is attributed to it rather than presented as independently confirmed, and the underlying sources it cites are identifiable: AMD's Advancing AI 2026 unveiling and EPYC 9006 disclosures, Morgan Stanley and TrendForce research, Koduri's TechSurge appearance, Tan's A Bit Personal interview, Ostrum's Windows Central interview, Nuvacore's own announcement, the BlueQubit arXiv preprint, and Microsoft's own lifecycle documentation.

Two claims in this roundup are projections rather than announcements, and are labelled as such above: Morgan Stanley's 6.75 million unit and $51 billion revenue figures, and Huaxin Securities' expectation that the price uptrend persists into 2027. The sold-out capacity claim is described in the source as coming from market sources rather than from AMD directly.

What is not verified

• The 2027 sold-out figure is attributed to market sources, not to AMD. No AMD announcement in this round confirms it, and the report says orders are being taken for 2028. Treat the capacity claim as strongly sourced but second-hand.
• IBM's quantum result has not been peer reviewed. The arXiv preprint status is stated in the source and is not a detail that can be glossed. The 110-year figure is an estimate produced by the authors using tensor-network contraction, not a measured classical run.
• Nuvacore has disclosed no specifications. Process node, cache hierarchy, pipeline depth, vector capability and tape-out schedule are all unknown, and the company has not committed to a business model.
• Ostrum did not confirm future AMD Surface hardware. He said the partnership continues and declined to confirm, which is not the same as a denial or an announcement.
• Hurricane-adjacent weather claims do not appear in this roundup and nothing here predicts hardware pricing with confidence. The Intel October 5 increase and the 40% server figure are reported numbers, not forecasts this site can model.
• Nothing here is first-hand verified. This site has no server, no quantum access and no Windows 11 26H2 machine. Every figure is a reported claim from the sources named above.

What is reported: AMD's sold-out 2027 capacity and 2028 orders, the 40% server price rise, 8 to 12 week lead times, Intel at about 50% of demand, the October 5 Intel increase, the 1.6 TB per second bandwidth and 31-SKU count, the Morgan Stanley and TrendForce figures, Nuvacore's founding team, Core First strategy and the ISA licensing constraints, Koduri's 400 gigawatt and $24 trillion arithmetic with the China Inc. framing and his hybrid-bonding claim, Tan's podcast remarks and the Nvidia stake arithmetic, the 26H2 build number, enablement package and support dates, the taskbar changes and the 26H1 upgrade block, Ostrum's quote and the Snapdragon X2 Plus performance claims, and the IBM experiment's parameters and its unreviewed status.

FAQ

Has AMD really sold out all its 2027 server CPUs?

Per BigGo Finance, market sources indicate all 2027 production capacity of the EPYC 9006 series is sold out and AMD has begun accepting orders for 2028. AMD did not announce this itself in the reporting, so the capacity claim is strongly sourced but second-hand. The driver is agentic AI, which moves work onto the CPU: TrendForce data cited in the same report puts CPU task orchestration at 50 to 90 percent of total latency in agentic workloads.

What is Nuvacore's WarpCore and why no instruction set?

Nuvacore, founded by Gerard Williams III, John Bruno and Ram Srinivasan, announced WarpCore on September 29 as a general-purpose CPU core designed without a fixed instruction set architecture. The strategy, called Core First, is to build the performance-critical core IP first and pick the ISA later, so engineers can optimise performance, power and area before architectural constraints bind. It is aimed at agentic AI workloads, on the argument that existing server and client CPUs were designed for predictable throughput and bursty performance rather than continuous, irregular access patterns.

How much does the AI buildout cost according to Raja Koduri?

Over 400 gigawatts of new compute infrastructure by 2030, at roughly $50 to 60 billion of capital expenditure per gigawatt, which implies about $24 trillion. Koduri's conclusion is that the capital does not exist, and his argument is that the real competition is between China Inc. and the rest of the world rather than between Western chipmakers. He puts Chinese buildout capex at under $10 billion per gigawatt and forecasts that target arriving much sooner than three years.

What is new in Windows 11 26H2 for most users?

Support longevity rather than features. It ships as a small enablement package, so the download is measured in kilobytes and installs across a single restart. Per BigGo Finance, 26H2 extends Home and Pro servicing to October 10, 2028, and Enterprise and Education to October 9, 2029, while 24H2 Home and Pro end on October 13, 2026. The visible changes include repositionable taskbar, done through Settings rather than by dragging, a smaller taskbar size, a customizable Start menu and a simplified context menu.

Why is there no AMD chip in the newest Surface devices?

Because of portfolio size rather than technical merit, per Brett Ostrum, Microsoft's corporate vice president for Surface devices. He told Windows Central that Microsoft loves working with AMD but has a limited portfolio and must make choices wisely, and that the two will keep working together on other products. He did not confirm whether AMD appears in future Surface hardware. The last Surface with an AMD chip was the Surface Laptop 4.

Did a quantum computer really beat a supercomputer by 110 years?

The reported result is that IBM's 120-qubit Nighthawk r2 generated 1 million random circuit samples in 19 seconds, where the researchers estimate a classical machine would need roughly 110 years, using tensor-network contraction applied to Frontier's sustained performance. Two qualifications matter. The result is an arXiv preprint and has not been peer reviewed, and the surviving quantum signal fidelity at 36 cycles was about 0.23 percent, which measures how much of the ideal distribution remains detectable rather than how accurate the computation is. What is genuinely new is that it ran on commercial cloud hardware with no custom calibration.

Bottom Line

The through-line is that the industry is now rationing. AMD cannot make enough server CPUs for 2027 and has taken 2028 orders, prices are up more than 40%, lead times stretch to six months, and Intel is satisfying about half of demand. The reason is a genuine workload shift, and the clearest number in the roundup is TrendForce's: CPU task orchestration now accounts for 50 to 90 percent of latency in agentic AI, which is why the CPU-to-GPU ratio is moving from 1:8 toward 1:1. The accelerator is no longer the only thing worth buying.

Running against that is the sharpest item here. Nuvacore, staffed by the architects of Nuvia and Apple silicon, is arguing that the capacity crunch is being solved with the wrong architecture, and that every CPU shipping now is an iteration on something designed before agentic workloads existed. Its answer is to design the core before committing to an instruction set. That claim is unresolved, and the licensing landscape is not on its side: RISC-V is open, Arm requires rights that Arm sells, and x86 is controlled by Intel and AMD.

Koduri supplies the frame and the problem at once. If the buildout needs $24 trillion of capital that he does not believe exists, and China Inc. can do it for a sixth of the cost, then the capacity crunch AMD is selling into may be the wrong crisis. His technical claim is the one to watch, because if a 7nm die stacked onto DRAM with hybrid bonding delivers what he says, the bottleneck moves again and this round of capacity problems looks like a scheduling error.

The two Microsoft stories are smaller but consistent with the pattern. A Windows feature update delivered in kilobytes and a Surface range that cannot fit a second CPU vendor are both decisions made under scarcity, one of engineering bandwidth and one of shelf space. And the quantum result is the outlier that makes the pattern legible: one item in seven describes a constraint being removed rather than allocated, and it has not been peer reviewed.

Related: EPYC Venice Agentic Benches Claim 20 Percent Over Vera [2026] | Windows 11 26H2 for Gaming: Performance Tests, Issues & Should You Upgrade? (2026 Guide) | Raja Koduri: No Transistor Left Behind (Hot Chips 2020 Keynote) | Intel’s Bold Reset: Can Lip-Bu Tan Win Over Nvidia and Broadcom?