Intel: NVIDIA Could Adopt Foveros 3D Packaging In H2 2028, Says GF Securities Analyst
Intel could land one of the most valuable packaging customers in the industry. According to a report Wccftech attributes to South Korea's GF Securities analyst Jeff Pu, NVIDIA might use Intel's Foveros chip packaging technology for backend needs in the second half of 2028, the same window in which Intel's 14A manufacturing node is slated to enter production. The claim is analyst speculation: neither Intel nor NVIDIA has confirmed anything.
By Indie Kings | October 17, 2026
Image: Intel 14A signage. Credit: Wccftech.
NVIDIA Tipped For Intel Foveros In H2 2028
Per the Wccftech report by Ramish Zafar published October 8, 2026, GF Securities analyst Jeff Pu claims NVIDIA might rely on Intel's Foveros packaging technology for some of its backend uses starting in the second half of 2028. The timing lines up with Intel's 14A process node, which the report ties to a production start in that same half year. Pu's public version of the call is a short post on X dated October 8, 2026, reading "Our expectations for Intel's external backend customers" alongside the $INTC ticker.
The note is thin on specifics. Wccftech states plainly that Pu's report "doesn't share many details except for somewhat corroborating the January report," referring to a separate DigiTimes claim covered earlier in the year. That matters for readers weighing the claim: this is a second analyst pointing in the same direction, not a contract announcement, a customer quote, or any document from either company.
The stakes justify the attention. NVIDIA is the industry's dominant AI GPU maker, and every step of its supply chain moves billions of dollars. If any part of NVIDIA's flow shifted to Intel's packaging lines, it would mark the first tangible NVIDIA revenue for Intel's external foundry business beyond earlier, fuzzier node reports.
Frontend Versus Backend: Where Intel Fits In The AI GPU Pipeline
As the article explains, advanced AI GPU fabrication splits into two lines. The frontend covers the portion of the product directly concerned with computing capability: the wafer-level manufacturing of the main GPU die itself. The backend covers everything that happens after the main chip is manufactured, such as packaging the chip cut from the wafer into the final product that arrives ready for a data center.
Intel's competitive position differs sharply between those two lines. Per the article, Intel is still catching up with TSMC when it comes to establishing itself as a contract manufacturer for advanced frontend technologies. In the backend, though, Intel has positioned itself as a provider of packaging technologies from the start. Its current offerings are EMIB and EMIB-T, both of which have been tipped multiple times to have secured Google's interest for the TPU AI chips.
That Google angle is the precedent underpinning Pu's new claim. After reports of Google relying on Intel's EMIB-T for its packaging requirements surfaced earlier in 2026, Pu's note extends the same logic to NVIDIA. If Google's TPU program can use an Intel backend, the argument goes, NVIDIA's AI accelerator program could too, with 2028 as the realistic start point given the 14A production window.
Foveros Versus EMIB-T: What True 3D Stacking Changes
Foveros is a different generation of packaging from what Google was reportedly lining up. Per the article, Foveros marks a major upgrade over EMIB-T through being a "true" 3D stacking technology. In Foveros, computing tiles are actively stacked on top of a base die. EMIB, by contrast, relies on placing tiles horizontally next to each other and bridging them.
The benefits the article describes are concrete: the stacking approach reduces a chip package's overall horizontal footprint and enables improved power efficiency and data speeds. For NVIDIA's purposes, a smaller package footprint matters at data center scale, where every rack counts board area. Better power efficiency matters more, because NVIDIA's flagship parts already push the limits of what a single server can feed and cool.
| Technology | How dies connect | Footprint effect | Reported customer interest |
|---|---|---|---|
| EMIB | Dies placed horizontally next to each other on a bridge | Baseline 2D package | Intel's current external packaging product |
| EMIB-T | Adds TSVs into the bridge for direct vertical power and signal delivery | Still a horizontal arrangement | Tipped for Google's TPU AI chips earlier in 2026 |
| Foveros | Computing tiles actively stacked on top of a base die in true 3D | Smaller overall horizontal package footprint | Tipped by Jeff Pu for NVIDIA backend use in H2 2028 |
The Run Of Intel Foundry Reports So Far
Pu's note does not appear in a vacuum. It joins a sequence of Intel foundry claims that has built up over 2026, each from a different source and none confirmed by the companies involved.
| Date | Source | Claim |
|---|---|---|
| January 2026 | DigiTimes | NVIDIA might use Intel's 18A or 14A nodes for its Feynman GPU products, with the main GPU die remaining on TSMC's advanced processes and Intel factoring into non-core IP |
| Earlier 2026 | Reports surfacing via Wccftech | Google tipped to rely on Intel's EMIB-T packaging for TPU AI chips |
| October 8, 2026 | Jeff Pu, GF Securities, per Wccftech | NVIDIA might use Intel Foveros for backend needs in H2 2028, coinciding with 14A production |
Read together, the January DigiTimes report and Pu's October note describe a consistent division of labor rather than competing claims. Per DigiTimes, the chip's main GPU die stays on TSMC's advanced processes while Intel enters through non-core IP. Pu's Foveros claim is a backend entry for the same customer, two years out. Neither report says NVIDIA would move its GPU manufacturing away from TSMC.
What It Could Mean For TSMC
The article frames a capacity rationale for the shift. NVIDIA's reliance on Intel Foveros technology, it says, should enable TSMC to relieve some pressure on its packaging operations as the global AI rush strains manufacturing capacity. In other words, this is not pitched as a TSMC quality problem. It is pitched as an overflow valve: TSMC's frontend and packaging lines are contended, and an offloading customer frees that capacity even if the customer never abandons it.
That framing also explains why the timing matters so much. Packaging is where the AI supply chain has been tightest, and 2028 is when NVIDIA's roadmap calls for larger, more complex multi-die packages. Adding Intel's advanced packaging lines as a second source in that window is the kind of capacity planning NVIDIA has historically done with memory suppliers, and it would give NVIDIA leverage on packaging lead times it does not currently have.
It bears repeating that all of this is attributed speculation. There is no Intel announcement, no NVIDIA statement, and no supply chain milestone Pu's note points to beyond the 14A production window itself. Wccftech's own framing, that Intel is "again tipped for a major foundry business win," signals the repetition of a tip, not the landing of an order.
FAQ
Who says NVIDIA might use Intel Foveros?
Jeff Pu, an analyst Wccftech attributes to South Korea's GF Securities, in a note published October 8, 2026 and relayed by Wccftech's Ramish Zafar.
When would NVIDIA start using Foveros?
The second half of 2028, the same window in which Intel's 14A node is slated to enter production according to the report.
What is Foveros?
Intel's true 3D packaging technology. Computing tiles are actively stacked on top of a base die, delivering a smaller horizontal package footprint than side by side die arrangements plus improved power efficiency and data speeds.
How is Foveros different from EMIB-T?
EMIB-T places dies horizontally next to each other with TSVs in the bridge for vertical power and signal delivery. Foveros stacks dies vertically on a base die instead.
Has Intel or NVIDIA confirmed any of this?
No. Both the Foveros claim and the January 14A and 18A claim are analyst and press speculation attributed to GF Securities and DigiTimes respectively.
Does this mean NVIDIA is leaving TSMC?
No. The January DigiTimes report has NVIDIA's main GPU die remaining on TSMC's advanced processes, with Intel entering through non-core IP and, per the new note, backend packaging.
Our take: Two independent tips pointing at Intel's backend a full two years out is more signal than a single anonymous source rumor, but 2028 is far enough away that this is capacity planning revealing itself early, not a done deal. We would treat the Google EMIB-T reports as the stronger indicator of Intel's external packaging business actually winning customers, and this NVIDIA claim as a thesis built on top of that precedent. If Intel's 14A slips, the coincidence of windows that makes this claim tidy evaporates.
Bottom Line
Per an October 8, 2026 Wccftech report on a note from GF Securities analyst Jeff Pu, NVIDIA might use Intel's Foveros packaging technology for backend needs in the second half of 2028, timed to Intel's 14A node entering production in that same window. The claim follows a January 2026 DigiTimes report that NVIDIA might use Intel's 18A or 14A for Feynman GPU products while keeping the main GPU die on TSMC, and reports that Google is tipped to use Intel's EMIB-T for TPU packaging. Foveros upgrades EMIB-T from horizontal die placement to true 3D stacking of computing tiles on a base die, cutting horizontal package footprint while improving power efficiency and data speeds, and NVIDIA's adoption would relieve packaging pressure on TSMC as the global AI rush strains capacity. Nothing here is confirmed by Intel or NVIDIA, and Pu's note shares few details beyond the timing.
Sources: Wccftech, "Intel Again Tipped For Major Foundry Business Win As NVIDIA Might Use Foveros Chip Technology In H2 2028, Says Analyst," Ramish Zafar, October 8, 2026: wccftech.com. The January 2026 DigiTimes claim and the Google EMIB-T reports are attributed within that article and were not independently verified.